This invention relates to arbitrating requests on computer buses.
Computer buses carry data from one part of a computer to another. As shown in FIG. 1, input/output (I/O) buses 12 carry data from I/O units 10 such as keyboards, disk drives, and graphics devices. The I/O bus 12, e.g., a peripheral component interconnect (PCI) bus, carries the data through a bridge 14 to a system bus 16. The system bus 16 carries data and processing requests to and from the central processing unit (CPU) 18 and random access memory (RAM) 20.
Instead of traveling on an I/O bus 12, graphics data and processing requests may travel on a special channel, e.g., an accelerated graphics port (AGP) 22. AGP 22 carries data and processing requests, in the order it receives it, from a graphics device 24 directly to the CPU 18.
In general, in one aspect, the invention features receiving arbitration requests belonging to respective bus types and associating with each of the types a programmed value representing a potential number of times that requests of that type may win arbitration events that occur in a given time period. For at least some arbitration events that occur in the given time period, the invention updates a counter value for at least some of the types, the counter value for each of the types being set initially to the programmed value, and chooses a winning type in each of the arbitration events based on at least some of the counter values of the types of requests that are contending in the arbitration event.
Other advantages and features will become apparent from the following description and from the claims.